Computer Science and Engineering student receives ASP-DAC 2017 best paper award

UNIVERSITY PARK, Pa. — Research about harvesting energy for The Internet of Things (IoTs) and wearable devices, in non-traditional ways, won the best paper award at this year’s Asia and South Pacific Design Automation Conference (ASP-DAC 2017).

“Spendthrift: Machine Learning Based Resource and Frequency Scaling for Ambient Energy Harvesting Nonvolatile Processors,” co-authored by Kaisheng Ma, a computer science and engineering doctoral student in the School of Electrical Engineering and Computer Science, was recognized last month. Distinguished Professor of Computer Science and Engineering Vijay Narayanan, and Assistant Professor Jack Sampson supervised the work.

Published for the conference, Ma’s research focuses on the design of a new generation of processors that operate only with scavenged energy.

“It proposes a technique that adapts the processor to perform the best based on the amount of energy it can scavenge from the environment,” Narayanan explained.

According to Silicon Labs, Thomson Reuters and Morgan Stanley, it is predicted that by 2020, there will be 50 billion devices that connect to the internet. Powering these devices will be challenging because in many cases replacing batteries will be expensive, dangerous or even unrealistic.

Instead of recharging these devices, which might not always be an option, Ma’s work focuses on reliable computation for energy-harvesting IoTs. Energy harvesting techniques, for instance, solar, wind, thermal, RF etc. can provide only an unstable power supply. Traditional low-power processors cannot fully solve the challenges brought by unstable power. Nonvolatile processors can achieve continuous computation through distributed nonvolatile elements by using fast, energy-efficient backing up and storing operations to retain the computation states.

“Nonvolatile processors try to continually run their programs under unstable power supply through distributed nonvolatile elements, in which fast, energy-efficient backing up and restoring operations help to retain the computation states,” Ma said. “In order to increase the partition of energy used for computation, spendthrift architecture utilizes the input energy as aggressively as possible through machine learning based smart frequency scaling. Meanwhile, targeting energy efficiency, spendthrift bottleneck resource allocation reduces energy per instruction based on neural networks predictors.”

Yuan Xie, a professor at the University of California, Santa Barbara, and Yongpan Liu, a professor at Tsinghua University in China, co-authored the paper.

The annual ASP-DAC aims to cultivate and promote interactions and presentations of novel ideas among Electronic Design Automation researchers and developers, and system/circuit/device-level designers.

Kaisheng Ma (second from right) and co-authors Xie and Liu (third and fourth from right, respectively), pose with organizing members of ASPDAC. Credit: Penn StateCreative Commons

Last Updated February 22, 2017